Education

My academic background combines Electrical and Electronics Engineering, Computer Engineering, Computer Software, parallel computer architectures, digital signal processing, and computer-aided digital-system design. My graduate studies were conducted at the University of Wisconsin–Madison and Istanbul Technical University.

Professor

Field: Computer Sciences and Engineering
Period: February 2009 – Present

Associate Professor

Date: November 24, 1999
Field: Computer Engineering Sciences — Computer and Control / Computer Software

Ph.D. in Computer Engineering

University: Istanbul Technical University, Control and Computer Engineering Department, Istanbul, Turkey
Period: September 1990 – July 1995
Advisor: Prof. Dr. Bülent Örencik
Thesis: A Parallel Hardware and Software Architecture for Digital Signal Processing

M.S. in Electrical and Computer Engineering

University: University of Wisconsin–Madison, Department of Electrical and Computer Engineering, Wisconsin, USA
Period: September 1987 – December 1989
Advisor: Dr. John F. Beetem
Thesis: Galaxy Hardware Description Language

B.S. in Electrical and Electronics Engineering

University: Middle East Technical University (METU), Department of Electrical and Electronics Engineering, Ankara, Turkey
Period: September 1981 – June 1986
English Preparation School: Middle East Technical University, 1981–1982

Ph.D. Thesis

Title: A Parallel Hardware and Software Architecture for Digital Signal Processing
University: Istanbul Technical University, Control and Computer Engineering Department
Advisor: Prof. Dr. Bülent Örencik
Period: September 1990 – July 1995

Thesis Summary

My Ph.D. thesis proposes a general hardware and software framework for the parallelization and implementation of a wide range of digital signal processing (DSP) algorithms on a parallel pipelined architecture suitable for the target algorithms. Depending on the algorithms implemented and the programming methodologies used, the proposed architecture operates as either an SSIMD or MIMD machine. The architecture and its six network configurations were partially implemented as an experimental DSP system called AdEPar (Advanced Educational Parallel), using printed circuit boards as processing elements based on TMS320C25 DSP processors.

Two-dimensional block-processing and DSP-processor-based scheduling implementation techniques were proposed for atomic data-flow graphs, while a simulation and implementation block-columnization scheduling technique was proposed for large-grain data-flow graphs. The concurrency provided by the proposed scheduling algorithms includes both temporal and spatial concurrency, and a third level of concurrency can also be achieved by using input- and output-synchronized circular buses.

The AdEPar visual object-oriented DSP environment, based on the theoretical work presented in the thesis, was developed to serve as a test bed for various scheduling, simulation, and code-generation problems.

Master's Thesis

Title: Galaxy Hardware Description Language
University: University of Wisconsin–Madison, Department of Electrical and Computer Engineering
Advisor: Dr. John F. Beetem
Period: September 1987 – December 1989

Thesis Summary

As part of my graduate studies, I developed a hardware description language called GHDL (Galaxy Hardware Description Language) for the Galaxy CAD Environment, which was developed by Dr. John F. Beetem and his students.

The Galaxy CAD Environment was developed specifically for digital-circuit simulation, and Galaxy was also the name of a high-level programming language developed by Dr. Beetem. Using GHDL, digital circuits within the Galaxy CAD Environment were described hierarchically.

The program generated an output file containing the circuit components and the associated netlist. The structure of this output file followed the Galaxy common-data-structure representation format, allowing it to be used directly by other simulation programs within the Galaxy CAD Environment. After describing a circuit using GHDL, users could define the signals and their timing characteristics for the circuit by using another Galaxy program.